Yunqi He

Yunqi He

Phd. Candidate in Computer Engineering

Project Duration

2023 - Present

Collaboration

NuLogiCS Research Group, Industry Partners

Keywords

Machine Learning, EDA Algorithms, Floorplan Optimization, Formal Verification

ML for Design Automation

Published:

Project Overview

This project explores how machine learning can revolutionize traditional Electronic Design Automation workflows. We develop ML-powered algorithms for complex EDA challenges, with current focus on novel floorplan optimization techniques and automated verification methods.

Research Motivation

Traditional EDA workflows face increasing complexity as chip designs grow larger and more sophisticated. Manual optimization and verification processes are becoming bottlenecks in the design cycle. Our work explores how machine learning can automate and enhance these critical EDA tasks.

Current Research Focus

Floorplan Algorithm Design

  • Innovation: Developing novel ML-powered placement and routing algorithms
  • Objective: Optimize power, performance, and area (PPA) metrics simultaneously
  • Approach: Leveraging deep learning for spatial relationship learning and optimization

ML-Enhanced Verification

  • RE3 Algorithm: Automatic refinement relation discovery for non-cycle-accurate designs
  • Impact: Enables efficient equivalence checking for complex design transformations
  • Application: Facilitates error detection in LLM-generated RTL designs

Technical Innovations

Machine Learning Methodologies

  • Graph Neural Networks: For capturing structural relationships in circuit designs
  • Reinforcement Learning: For optimization decision-making in placement algorithms
  • Deep Learning: For pattern recognition in design space exploration

EDA Integration

  • Tool Compatibility: Ensuring ML algorithms integrate with existing EDA toolchains
  • Scalability: Handling industrial-scale design complexities
  • Performance: Achieving better results than traditional heuristic methods

Research Applications

Placement and Routing

  • Floorplan Optimization: ML-driven spatial arrangement of circuit components
  • Routing Efficiency: AI-enhanced wire routing for timing and power optimization
  • Multi-objective Design: Simultaneous optimization across multiple design metrics

Design Verification

  • Automated Checking: ML-enhanced formal verification methods
  • Equivalence Relations: Automatic discovery of design transformation relationships
  • Error Detection: AI-assisted identification of design inconsistencies

Performance and Impact

  • Algorithm Efficiency: Significant improvement over traditional EDA heuristics
  • Industry Relevance: Focus on deployable solutions for real-world design flows
  • Academic Recognition: RE3 algorithm accepted at DAC 2025

Methodological Approach

  • Data-Driven Design: Leveraging large design databases for ML training
  • Hybrid Methods: Combining ML with traditional EDA algorithms
  • Continuous Learning: Adaptive algorithms that improve with experience
  1. Property Guided Secure Configuration Space Search - ISC 2024
  2. SE3: Sequential Equivalence Checking for Non-Cycle-Accurate Design Transformations - DAC 2023
  3. RE3: Finding Refinement Relations with Relational Mapping Abstraction - DAC 2025

Future Research Directions

  • Machine Learning Integration: Combining formal methods with ML for enhanced analysis
  • Distributed Systems: Extension to large-scale distributed system verification
  • Real-time Verification: Development of online verification capabilities
  • Domain-Specific Languages: Creating specialized languages for configuration specification
  • Quantum System Verification: Extending formal methods to quantum computing systems